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Burst-Mode PON Controller
With Integrated Monitoring
Table 02h. Register Map
TABLE 02h (PW2)
ROW
ROW
WORD 0
WORD 1
WORD 2
WORD 3
(HEX)
NAME
BYTE 0/8
BYTE 1/9
BYTE 2/A
BYTE 3/B
BYTE 4/C
BYTE 5/D
BYTE 6/E
BYTE 7/F
CONFIG0
MODE
TINDEX
MOD DAC
APC DAC
DEVICE ID
DEVICE VER
80
<0>
<8>
<4>
<4>
<4>
<4>
BIAS DAC2
<4>
BIAS DAC2
<10>
<10>
CONFIG1
88
<8>
UPDATE
RATE
CONFIG
START-UP
STEP
MOD
RANGING
DEVICE
ADDRESS
COMP
RANGING
RSHIFT1
RSHIFT0
SCALE0
SCALE1
OFFSET0
OFFSET1
90
98
A0
A8
<8>
<8>
<8>
<8>
RESERVED
MON3 SCALE
RESERVED
MON3 OFFSET
VCC SCALE
RESERVED
VCC OFFSET
RESERVED
MON1 SCALE
RESERVED
MON1 OFFSET
RESERVED
MON2 SCALE
RESERVED
MON2 OFFSET
INTERNAL TEMP OFFSET*
B0
<9>
PWD VALUE
PW1 MSB
PW1 LSB
PW2 MSB
PW2 LSB
INTERRUPT
MAN IBIAS
B8
C0-F7
F8
<8>
<4>
EMPTY
FETG EN1
EMPTY
MAN IBIAS0
FETG EN0
EMPTY
MAN IBIAS1
TX-F EN1
EMPTY
MAN_CNTL
TX-F EN0
EMPTY
RESERVED
HTXP
EMPTY
RESERVED
LTXP
EMPTY
RESERVED
HBIAS
EMPTY
RESERVED
MAX IBIAS
EMPTY
RESERVED
* The Final Result must be XOR’ed with BB40h before writing to this register.
Access Code
Read Access
Write Access
<0>
See each
bit/byte
separately
<1>
All
PW2
<2>
All
N/A
<3>
All
All and
DS1863
<4>
PW2
PW2 +
mode bit
<5>
All
All
<6>
N/A
All
<7>
PW1
PW1
<8>
PW2
PW2
<9>
N/A
PW2
<10>
PW2
N/A
<11>
All
PW1
Hardware
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21
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